1. Field
Exemplary embodiments of the present invention relate to semiconductor design technology, and more particularly, to a semiconductor device and a power voltage supply circuit for a test operation of a semiconductor system including the semiconductor device.
2. Description of the Related Art
Semiconductor devices may operate according to two or more types of power supply voltages received from external devices.
For example, a nonvolatile memory device may receives from separate external devices a first power supply voltage VCCE for data input/output operations and a second power supply voltage VCCQ for operations other than the data input/output operations, where such separate power supply voltage use increases the operation speed of the nonvolatile memory device.
IN providing the first power supply voltage and the second power supply voltage to a nonvolatile memory device, the nonvolatile memory device may have separate input pads for receiving the first power supply voltage VCCE and the second power supply voltage VCCQ and have separate power lines corresponding to the separate input pads.
In a normal operation of a nonvolatile memory device, two power supply voltages having different voltage levels may be applied respectively to two power supply voltage input pads. However, as illustrated in FIG. 1, in a test operation of the nonvolatile memory device, a power supply voltage generated by a power supply voltage transmission driver may be applied in common to two power supply voltage input pads, or a power supply voltage generated by a power supply voltage transmission driver and a power supply voltage generated by a data transmission driver may be applied respectively to two power supply voltage input pads.
Here, two power supply voltages generated through two power supply voltage transmission drivers are not directly applied to one semiconductor device in a test operation of the nonvolatile memory device for reasons stated below.
In general, a plurality of nonvolatile memory devices are connected to test equipment to perform a test operation. Here, the test operation may vary greatly depending on whether the test equipment can supply one power supply voltage or two power supply voltages to the nonvolatile memory devices.
In other words, here may be a limitation in the number of power supply voltages that can be simultaneously supplied by test equipment. The time and cost taken to perform the test operation increase greatly when the test equipment can supply two power supply voltages to the nonvolatile memory devices, as compared to when the test equipment can supply just one power supply voltage to the nonvolatile memory devices.
Thus, to address such features, a power supply voltage transmission driver is used to generate and transmit one of two power supply voltages to the nonvolatile memory device, and a data transmission driver is used to generate and transmit the other power supply voltage to the nonvolatile memory device in a state where a data signal is to maintain a logic-high level.
Here, the data transmission driver of the test equipment may be smaller in size than the power supply voltage transmission driver and may not have a large current driving strength. Therefore, the power supply voltage generated and transmitted by the data transmission driver of the test equipment to the nonvolatile memory device is unstable in voltage level and the time taken to perform the test operation increases as the result.
For example, the data transmission driver of the test equipment may produce a small current equal to, for example, about 40 mA current but no greater than 100 mA current. Here, in designing the power supply voltage transmission driver of the test equipment may be designed to process more than 100 mA current in some occasions, the power supply voltage applied through the data transmission driver of the test equipment to the nonvolatile memory device will have an unstable voltage level and thus, the time taken to perform the test operation increases.
According to an example, if one power supply voltage is applied in common to two power supply voltage input pads in the test operation, a nonvolatile memory device may generate an internal voltage corresponding to a second power supply voltage. To this end, the conventional art may use a voltage down converting scheme.
For example, if a first power supply voltage VCCE has a voltage level of 3.3 V and a second power supply voltage VCCQ has a voltage level of 1.8 V, the first power supply voltage VCCE can be used in generating the second power supply voltage VCCQ with a voltage down converting scheme.
However, in using the first power supply voltage VCCE to generate the second power supply voltage VCCQ with a voltage down converting scheme, a stand-by current and an off-leakage current may occur and thus excess current consumption may occur.